Mission Critical Design

FPGA’s and heterogeneous SoC’s are used in an increasing number of mission critical or high reliability applications. These applications span a diverse range from industrial, medical and scientific to defense, transportation and even space. For these devices to safely and reliability operate in an often-harsh environment, a more rigorous design approach is required. One that introduces both stricter engineering governance in the design process and design mitigation techniques. As such designing these solutions requires the designer to not only understand what techniques can be used at the logic level but also, the wider systematic, regulatory and environmental issues. This course will therefore present the environmental challenges and what they mean to the logic designer. Along with introducing high level concepts such as SIL level, Reliability and Mean Time to Failure, attendees will also gain an understanding of the importance of engineering governance. The focus of this course is the development of techniques which can be used in programmable logic including Clocking & Reset strategy, Triple Modular Redundancy, IO Planning, Safe State Machines and Counters, Error Correcting Codes, Single Event Effect Mitigation along with Verification strategies and metrics, formal equivalence checking, Synthesis strategies and several other advanced techniques. Each session will complete with a Lab which will demonstrate the concepts outlined in the session. Attendees will at the completion of the course have a detailed understanding of the challenges and strategies to address the creation of mission critical systems for a wide range of applications.